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Dual, Unipolar/Bipolar, High-Voltage
Digital Pulsers
Pin Description
PIN
1
2,3
4, 10, 33,
39
5
6
7, 15, 28,
36, 44, 55
8
9
11, 12
13
14
16, 54
17
18
19
20
21
22
23
24
25
26
27, 45
29
30
NAME
C GP1
V PP1
N.C.
OP1
OCP1
GND
OCN1
ON1
V NN1
C GN1
C DN1
V CC1
INN1
INC1
INP1
EN1
SHDN
AGND
EN2
INP2
INC2
INN2
V CC2
C DN2
C GN2
FUNCTION
Channel 1 High-Side Gate Input. Connect a 1nF to 10nF capacitor between C DP1 and C GP1 as close as
possible to the device.
Channel 1 High-Side Positive Supply Voltage Input. Bypass V PP1 to GND with a 0.1μF as close as
possible to the device. See the Power Supplies and Bypassing section. Depending on the output,
additional bypassing may be required.
No Connection. Not connected internally.
Channel 1 High-Side Drain Output
Channel 1 High-Side Clamp Output
Ground
Channel 1 Low-Side Clamp Output
Channel 1 Low-Side Drain Output
Channel 1 High-Side Negative Supply Voltage Input. Bypass V NN1 to GND with a 0.1μF as close as
possible to the device. See the Power Supplies and Bypassing section. Depending on the output,
additional bypassing may be required.
Channel 1 Low-Side Gate Input. Connect a 1nF to 10nF capacitor between C DN1 and C GN1 as close as
possible to the device.
Channel 1 Low-Side Driver Output. Connect a 1nF to 10nF capacitor between C DN1 and C GN1 as close
as possible to the device.
Channel 1 Gate-Drive Supply Voltage Input. Bypass V CC1 to GND with a 0.1μF as close as possible to
the device. See the Power Supplies and Bypassing section. Depending on the output, additional
bypassing may be required.
Channel 1 Low-Side Logic Input (Table 1)
Channel 1 Clamp Logic Input. Clamps OCP1 and OCN1 are turned on when INC1 is high and when INP1
and INN1 are low (see Table 1).
Channel 1 High-Side Logic Input (Table 1)
Channel 1 Enable Logic Input. Drive EN1 high to enable OP1 and ON1. Pull EN1 low to turn on the gate-
source short circuit (see Table 1).
Shutdown Logic Input (Table 1)
Analog Ground. Must be connected to common GND.
Channel 2 Enable Logic Input. Drive EN2 high to enable OP2 and ON2. Pull EN2 low to turn on the gate-
source short circuit. See Table 1.
Channel 2 High-Side Logic Input (Table 1)
Channel 2 Clamp Logic Input. Clamps OCP2 and OCN2 are turned on when INC2 is high and when INP2
and INN2 are low. See Table 1.
Channel 2 Low-Side Logic Input (Table 1)
Channel 2 Gate-Drive Supply Voltage Input. Bypass V CC2 to GND with a 0.1μF as close as possible to
the device. See the Power Supplies and Bypassing section. Depending on the output, additional
bypassing may be required.
Channel 2 Low-Side Driver Output. Connect a 1nF to 10nF capacitor between C DN2 and C GN2 as close
as possible to the device.
Channel 2 Low-Side Gate Input. Connect a 1nF to 10nF capacitor between C DN2 and C GN2 as close as
possible to the device.
8
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